In August 2007 I finally decided to purchase an FPGA development board. I chose the Digilent Spartan 3E Started Board, which is actually still available for the same price I paid 3 years ago… I’m not sure if that is a good thing or a bad thing? Anway, I made my choice based on a few criteria:
- Price. $150 for the devboard was within my budget
- Xilinx seemed to be one of the major leaders and players in the FPGA market (I think they invented FPGAs)
- The 3E devboard came with a 500K gate FPGA, even though I really did not understand how that translated into capacity, 500K seemed like enough gates for anything I would want to initially do
- Xilinx offers a complete and free development suite
- The guy over at FPGA Arcade used that same devboard to reproduce the original PACMAN coin-op arcade circuit board
That last point was probably the deciding factor for me since I wanted to do something similar, i.e. reproduce a early 80’s computer system (the TI-99/4A) on an FPGA. It also meant I could download his VHDL and start hacking to see how things worked. Not to mention running PACMAN hardware would be cool. I never really liked PACMAN, but the idea that the FPGA is reproducing the actual *hardware*, and not doing any kind of emulation as we think of it with such programs as MAME, is really exciting to wrap your head around.
Unfortunately I never had time to really mess with FPGA development until early 2010! I did managed to get PACMAN running within a few hours of receiving my devboard in the mail, but it got put on a shelf and buried for the next 3 years.
Having used the board for the past 7 months, I can say now that there are a few things I wish I had known when I bought it. Devboards are nice because they usually have some extra chips on them that you might want to use in your design, so you can just start developing with them.
In the case of the 3E Started Board, the external RAM (external to the FPGA itself) on the devboard is a DDR SDRAM, which is really a pain in the ass to use and means you have to design a DDR SDRAM controller in your FPGA (not trivial, and certainly not for a beginner.) The predecessor to the devboard I bought (and still available, and cheaper to boot) had a 512K SRAM, which is much easier to work with, albeit not as fast as the DDR SDRAM, but fast enough for most things.
The other problem for me was the user’s IO ports. On my devboard the bulk of the user’s IO is wired to a very high density 100-pin HiRose connector. Also, the of the 200+ IO pins on the FPGA, only 50 or so are available via the HiRose connector. Thus, to get the number of IO pins I needed for my projects, I had to order the female HiRose connector from Mouser and hand crimp some ribbon cable to the thing (which was a serious pain in the ass!) Again, the predecessor devboard had most of the FPGA’s IO pins brought out to standard pin headers that are very easy to work with.
Thus, knowing what I do now, I would probably have bought the “lesser” devboard for what I wanted to do. The only caveat is the 250K gate FPGA on the earlier devboard vs. the 500K gate FPGA I have on the devboard I bought.
Here is a picture (and link) to the one I bought:
This is the earlier version, which I’m really considering buying so I can work on replacing the TMS9900 CPU.
I also recently discovered that SparkFun has a Spartan 3E devboard that is basically the FPGA with a complete breakout of all the pins. I’m really temped to pick up one of these as well: